* Self-biased JFET Amplifier using 2N3819 - response to 100 Hz sine wave

* Analysis setup - plot output for 20ms at 10 us intervals 
.tran 10us 20ms
.OP 

* Vdd is 20 V and is applied between node 3 and 0 (ground)
VDD 3 0 20V
* Vin is a 0.25 v peak sine wave at 100 Hz applied between node 1 & ground
VIN 1 0 SIN 0 0.25 100 0 0 0

* 2N3819 - drain = node 4, gate = node 2, source = node 5
J1 4 2 5 J2N3819 

* Gate resistor between node 2 (gate) and ground
RG 0 2  1MEG  
* Drain resistor between node 4 (drain) and Vdd (node 3)
RD 4 3  3k3  
* Source resistor between node 5 (source) and ground
RS 0 5  470  
* Input coupling capacitor between node 1 (sine source) and node 2 (gate)
C1 1 2  1u  
* Source bypass ca[acitor between node 5 (source) and ground
C3 0 5  1u  

* Model for 2N3819 JFET
.model J2N3819 NJF(Beta=1.304m Rd=1 Rs=1 Lambda=2.25m Vto=-3
+ Is=33.57f Cgd=1.6p Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 Af=1) 

* Automatically load PROBE graphics environment (pSpice only)
.probe

.END